IDEC MICROSmart FC6A Series Ladder Programming Manual page 122

4: B I
ASIC NSTRUCTIONS
Reverse Shift Register (SFRN)
For reverse shifting, use the SFRN instruction. When SFRN instructions are programmed, two addresses are always required. The
SFRN instructions are entered, followed by a shift register number selected from appropriate device addresses. The shift register
number corresponds to the lowest bit number in a string. The number of bits is the second required address after the SFRN
instructions.
The SFRN instruction requires three inputs. The reverse shift register circuit must be programmed in the following order: reset
input, pulse input, data input, and the SFRN instruction, followed by the last bit and the number of bits.
Ladder Diagram
Last Bit
Reset
SFRN R20
7
I0
Pulse
# of Bits
I1
Data
I2
R21
R23
R25
• The last bit status output can be programmed directly after the SFRN instruction. In this example, the status of bit R20 is read to output Q0.
• Each bit can be loaded using the LOD R# instructions.
• For details of reset, pulse, and data inputs, see "Forward Shift Register (SFR)" on page 4-24.
Structural Diagram
Shift Direction
R20 R21 R22 R23 R24 R25 R26
Last Bit: R20
Note: Output is initiated only for those bits highlighted in bold print.
Note: When power is turned off, the statuses of all shift register bits are normally cleared. It is also possible to maintain the statuses of shift register
bits by using the Function Area Settings as required. See Chapter 5 "Functions and Settings" - "Memory Backup" in the "FC6A Series MICROSmart
User's Manual".
Note: The SFRN instruction cannot be used in an interrupt program. If used, a user program execution error will result, turning on special internal
relay M8004 and the ERR LED on the FC6A Series MICROSmart. For details about the user program execution errors, see "User Program Execution
Errors" on page 3-10.
Note: For restrictions on ladder programming of shift register instructions, see "Restriction on Ladder Programming" on page 4-33.
4-26
Q0
Last Bit
# of Bits
Q1
Q2
Q3
Reset
I0
Data
I2
Pulse
# of Bits: 7 I1
FC6A S MICROS
ERIES MART
R0 to R255
1 to 256
L P M
ADDER ROGRAMMING ANUAL
Program List
Instruction
LOD
LOD
LOD
SFRN
OUT
LOD
OUT
LOD
OUT
LOD
OUT
FC9Y-B1726
Data
I0
I1
I2
R20
7
Q0
R21
Q1
R23
Q2
R25
Q3