Sfr And Sfrn (Forward And Reverse Shift Register) - IDEC MICROSmart FC6A Series Ladder Programming Manual

4: B I
ASIC NSTRUCTIONS

SFR and SFRN (Forward and Reverse Shift Register)

FC6A Series MICROSmart have a shift register consisting of 256 bits which are allocated to R0 through R255. Any number of
available bits can be selected to form a train of bits which store on or off status. The on/off data of constituent bits is shifted in the
forward direction (forward shift register) or in the reverse direction (reverse shift register) when a pulse input is turned on.
Forward Shift Register (SFR)
When SFR instructions are programmed, two addresses are always required. The SFR instruction is entered, followed by a shift
register number selected from appropriate device addresses. The shift register number corresponds to the first, or head bit. The
number of bits is the second required address after the SFR instruction.
The SFR instruction requires three inputs. The forward shift register circuit must be programmed in the following order: reset
input, pulse input, data input, and the SFR instruction, followed by the first bit and the number of bits.
Ladder Diagram
First Bit
Reset
SFR R0
4
I0
Pulse
# of Bits
I1
Data
I2
Structural Diagram Structural Diagram
Shift Direction Shift Direction
Reset Reset
I0 I0
Data Data
R0 R0 R1 R1
I2 I2
Pulse Pulse
I1 I1
First Bit: R0
Reset Input
The reset input will cause the value of each bit of the shift register to return to zero. Initialize pulse special internal relay, M8120,
may be used to initialize the shift register at start-up.
Pulse Input
The pulse input triggers the data to shift. The shift is in the forward direction for a forward shift register and in reverse for a
reverse shift register. A data shift will occur upon the leading edge of a pulse; that is, when the pulse
been on and stays on, no data shift will occur.
Data Input
The data input is the information which is shifted into the first bit when a forward data shift occurs, or into the last bit when a
reverse data shift occurs.
Note: When power is turned off, the statuses of all shift register bits are normally cleared. It is also possible to maintain the statuses of shift
register bits by using the Function Area Settings as required. See Chapter 5 "Functions and Settings" - "Memory Backup" in the "FC6A Series
MICROSmart User's Manual".
Note: The SFR instruction cannot be used in an interrupt program. If used, a user program execution error will result, turning on special internal
relay M8004 and the ERR LED on the FC6A Series MICROSmart. For details about the user program execution errors, see "User Program Execution
Errors" on page 3-10.
Note: For restrictions on ladder programming of shift register instructions, see "Restriction on Ladder Programming" on page 4-33.
4-24
First Bit
# of Bits
R2 R2 R3 R3
# of Bits: 4 # of Bits: 4
FC6A S MICROS
ERIES MART
R0 to R255
1 to 256
L P M
ADDER ROGRAMMING ANUAL
Program List
Instruction
LOD
LOD
LOD
SFR
turns on
. If the pulse has
FC9Y-B1726
Data
I0
I1
I2
R0
4