IDEC MICROSmart FC6A Series Ladder Programming Manual page 182

9: S / R I
HIFT OTATE NSTRUCTIONS
Examples: SFTL
• N_B = 16 bits
M8120
SFTL
SOTU
I0
Bits to shift = 1
Before shift: D10 = 43690
After first shift: D10 = 21844
After second shift: D10 = 43688
• N_B = 32 bits
M8120
SFTL
SOTU
I0
Bits to shift = 2
Before shift:
CY MSB
1 1
M8003
After shift:
CY MSB
1 1 1
M8003
9-2
MOV(W) S1 –
43690
S1 S2
D10 0
CY
M8003
CY
1
M8003
CY
0
M8003
MOV(W) S1 –
0
MOV(W) S1 –
65535
S1 S2
D10 1
D11
1 1 1 1 1 1 1 1 1
D11
1 1 1 1 1 1 1 1 1
FC6A S MICROS
ERIES
M8120 is the initialize pulse special internal relay.
D1 – REP
When the CPU starts operation, the MOV (move) instruction sets
D10
43,690 to data register D10.
N_B Bits
Each time input I0 is turned on, 16-bit data of data register D10 is
16 1
shifted to the left by 1 bit as assigned by device Bits. The last bit
status shifted out is set to special internal relay M8003 (carry or
borrow). Zeros are set to the LSB.
MSB
1 0 1 0 1 0
MSB
0 1 0 1 0 1
MSB
1 0 1 0 1 0
M8120 is the initialize pulse special internal relay.
D1 – REP
When the CPU starts operation, the MOV (move) instructions set
D10
0 and 65,535 to data registers D10 and D11, respectively.
D1 – REP
Each time input I0 is turned on, 32-bit data of data registers D10
D11
and D11 is shifted to the left by 2 bits as assigned by device Bits.
D10 is the low word, and D11 is the high word.
N_B Bits
32 2
The last bit status shifted out is set to a carry (special internal
relay M8003). Ones are set to the LSBs.
1 1 1 1 1 0 0 0
Shift to the left
1 1 1 0 0 0 0 0
L P
MART ADDER ROGRAMMING
D10
1 0 1 0 1 0 1 0
Shift to the left
D10
0 1 0 1 0 1 0 1
D10
1 0 1 0 1 0 1 0
D10
0 0 0 0 0 0 0 0
D10
0 0 0 0 0 0 0 0
M FC9Y-B1726
ANUAL
S2
LSB
1 0 0
LSB
0 0 0
LSB
0 0
S2
LSB
0 0 0 0 0 1
LSB
0 0 0 1 1