Output Compare Output Timing; Figure 12.16 Output Compare Output Timing - Renesas H8 Series Hardware Manual

Section 12 Timer W
12.5.2

Output Compare Output Timing

The compare match signal is generated in the last state in which TCNT and GR match (when
TCNT changes from the matching value to the next value). When the compare match signal is
generated, the output value selected in TIOR is output at the compare match output pin (FTIOA,
FTIOB, FTIOC, or FTIOD).
When TCNT matches GR, the compare match signal is generated only after the next counter clock
pulse is input.
Figure 12.16 shows the output compare timing.
φ
TCNT input
clock
TCNT
GRA to GRD
Compare
match signal
FTIOA to FTIOD
Rev. 3.00 Sep. 14, 2006 Page 182 of 408
REJ09B0105-0300
N
N

Figure 12.16 Output Compare Output Timing

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