Timer Control/Status Register V (Tcsrv) - Renesas H8 Series Hardware Manual

Section 11 Timer V
11.3.4

Timer Control/Status Register V (TCSRV)

TCSRV indicates the status flag and controls outputs by using a compare match.
Bit Bit Name
7 CMFB
6 CMFA
5 OVF

4
3 OS3
2 OS2
Rev. 3.00 Sep. 14, 2006 Page 150 of 408
REJ09B0105-0300
Initial
Value R/W Description
0 R/W Compare Match Flag B
[Setting condition]
•
[Clearing condition]
•
0 R/W Compare Match Flag A
[Setting condition]
•
[Clearing condition]
•
0 R/W Timer Overflow Flag
[Setting condition]
•
[Clearing condition]
•

1 Reserved
This bit is always read as 1.
0 R/W Output Select 3 and 2
0 R/W These bits select an output method for the TMOV pin by
the compare match of TCORB and TCNTV.
00: No change
01: 0 output
10: 1 output
11: Output toggles
When the TCNTV value matches the TCORB value
After reading CMFB = 1, cleared by writing 0 to CMFB
When the TCNTV value matches the TCORA value
After reading CMFA = 1, cleared by writing 0 to CMFA
When TCNTV overflows from H'FF to H'00
After reading OVF = 1, cleared by writing 0 to OVF