Renesas H8 Series Hardware Manual page 407

16-bit single-chip microcomputer
Hide thumbs Also See for H8 Series:
Table of Contents

Advertisement

Instruction Mnemonic
SUBX
SUBX #xx:8, Rd
SUBX. Rs, Rd
TRAPA
TRAPA #xx:2
XOR
XOR.B #xx:8, Rd
XOR.B Rs, Rd
XOR.W #xx:16, Rd
XOR.W Rs, Rd
XOR.L #xx:32, ERd
XOR.L ERs, ERd
XORC
XORC #xx:8, CCR
Notes: 1. n: Specified value in R4L and R4. The source and destination operands are accessed
n+1 times respectively.
2. Cannot be used in this LSI.
Instruction
Branch
Fetch
Addr. Read
I
J
1
1
2
1
1
1
2
1
3
2
1
Stack
Byte Data
Operation
Access
K
L
2
Rev. 3.00 Sep. 14, 2006 Page 377 of 408
Appendix
Word Data
Internal
Access
Operation
M
N
4
REJ09B0105-0300

Advertisement

Table of Contents
loading

Table of Contents