Section 17 Band-Gap Circuit, Power-On Reset, And Low-Voltage Detection Circuits - Renesas H8 Series Hardware Manual

Section 17 Band-Gap Circuit, Power-On Reset, and Low-Voltage Detection Circuits

Section 17 Band-Gap Circuit, Power-On Reset, and
Low-Voltage Detection Circuits
This LSI can include a band-gap circuit (BGR, band-gap regulator), a power-on reset circuit and
low-voltage detection circuit.
BGR supplies a reference voltage to the on-chip oscillator and low-voltage detection circuit.
Figure 17.1 shows the block diagram of how BGR is allocated.
The low-voltage detection (LVD) circuit consists of two circuits: LVDI (interrupt by low voltage
detection) and LVDR (reset by low voltage detection) circuits.
This circuit is used to prevent abnormal operation (program runaway) from occurring due to the
power supply voltage fall and to recreate the state before the power supply voltage fall when the
power supply voltage rises again.
Even if the power supply voltage falls, the unstable state when the power supply voltage falls
below the guaranteed operating voltage can be removed by entering standby mode when
exceeding the guaranteed operating voltage and during normal operation. Thus, system stability
can be improved. If the power supply voltage falls more, the reset state is automatically entered. If
the power supply voltage rises again, the reset state is held for a specified period, then active mode
is automatically entered.
Figure 17.2 is a block diagram of the power-on reset circuit and the low-voltage detection circuit.
Rev. 3.00 Sep. 14, 2006 Page 285 of 408
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