Renesas H8 Series Hardware Manual page 279

Bit Bit Name Initial Value R/W Description
4 NAKIE 0
3 STIE 0
2 ACKE 0
1 ACKBR 0
0 ACKBT 0
R/W NACK Receive Interrupt Enable
This bit enables or disables the NACK receive interrupt
request (NAKI) and the overrun error (setting of the OVE bit
in ICSR) interrupt request (ERI) with the clocked
synchronous format, when the NACKF and AL bits in ICSR
are set to 1. NAKI can be canceled by clearing the NACKF,
OVE, or NAKIE bit to 0.
0: NACK receive interrupt request (NAKI) is disabled.
1: NACK receive interrupt request (NAKI) is enabled.
R/W Stop Condition Detection Interrupt Enable
0: Stop condition detection interrupt request (STPI) is
disabled.
1: Stop condition detection interrupt request (STPI) is
enabled.
R/W Acknowledge Bit Judgement Select
0: The value of the receive acknowledge bit is ignored, and
continuous transfer is performed.
1: If the receive acknowledge bit is 1, continuous transfer is
halted.
R Receive Acknowledge
In transmit mode, this bit stores the acknowledge data that
are returned by the receive device. This bit cannot be
modified.
0: Receive acknowledge = 0
1: Receive acknowledge = 1
R/W Transmit Acknowledge
In receive mode, this bit specifies the bit to be sent at the
acknowledge timing.
0: 0 is sent at the acknowledge timing.
1: 1 is sent at the acknowledge timing.
2
Section 15 I C Bus Interface 2 (IIC2)
Rev. 3.00 Sep. 14, 2006 Page 249 of 408
REJ09B0105-0300