User Pmod Gpio Headers - Xilinx ZCU102 User Manual

X-Ref Target - Figure 3-27

User PMOD GPIO Headers

[Figure 2-1, callout 19]
The ZCU102 evaluation board supports two PMOD GPIO headers J55 (right-angle female)
and J87 (vertical male). The PMOD nets are wired to the XCZU9EG device U1 bank 47.
Figure 3-28 shows the GPIO PMOD headers J55 and J87.
between the XCZU9EG MPSoC and the PMOD connectors.
X-Ref Target - Figure 3-28
ZCU102 Evaluation Board User Guide
UG1182 (v1.2) March 20, 2017
Figure 3-27: SFP/SFP+ Clock Recovery
Figure 3-28: PMOD Connectors
www.xilinx.com
Chapter 3: Board Component Descriptions
Table 3-31 lists the connections
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