Xilinx ZCU102 User Manual page 87

Table 3-39 lists GTH bank 229 connections.
Table 3-39: ZCU102 GTH Bank 229 Interface Connections
XCZU9EG XCZU9EG (U1) Pin
(U1) Pin Name
MGTHTXP0_229
K6
K5 MGTHTXN0_229
K2 MGTHRXP0_229
K1 MGTHRXN0_229
MGTHTXP1_229
H6
H5 MGTHTXN1_229
J4 MGTHRXP1_229
MGTHRXN1_229
J3
G4 MGTHTXP2_229
G3 MGTHTXN2_229
H2 MGTHRXP2_229
MGTHRXN2_229
H1
F6 MGTHTXP3_229
F5 MGTHTXN3_229
F2 MGTHRXP3_229
MGTHRXN3_229
F1
G8 MGTREFCLK0P_229
G7 MGTREFCLK0N_229 FMC_HPC0_GBTCLK0_M2C_C_N
MGTREFCLK1P_229
E8
E7 MGTREFCLK1N_229 NC
Notes:
1. Series capacitor coupled.
2. MGT connections I/O standard not applicable.
ZCU102 Evaluation Board User Guide
UG1182 (v1.2) March 20, 2017
Schematic Net Name
FMC_HPC0_DP3_C2M_P
FMC_HPC0_DP3_C2M_N
FMC_HPC0_DP3_M2C_P
FMC_HPC0_DP3_M2C_N
FMC_HPC0_DP1_C2M_P
FMC_HPC0_DP1_C2M_N
FMC_HPC0_DP1_M2C_P
FMC_HPC0_DP1_M2C_N
FMC_HPC0_DP0_C2M_P
FMC_HPC0_DP0_C2M_N
FMC_HPC0_DP0_M2C_P
FMC_HPC0_DP0_M2C_N
FMC_HPC0_DP2_C2M_P
FMC_HPC0_DP2_C2M_N
FMC_HPC0_DP2_M2C_P
FMC_HPC0_DP2_M2C_N
FMC_HPC0_GBTCLK0_M2C_C_P
NC
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Chapter 3: Board Component Descriptions
Connected To
(2)
Pin No. Pin Name
DP3_C2M_P
A30
A31 DP3_C2M_N
A10 DP3_M2C_P
A11 DP3_M2C_N
DP1_C2M_P
A22
A23 DP1_C2M_N
A2 DP1_M2C_P
DP1_M2C_N
A3
C2 DP0_C2M_P
C3 DP0_C2M_N
C6 DP0_M2C_P
DP0_M2C_N
C7
A26 DP2_C2M_P
A27 DP2_C2M_N
A6 DP2_M2C_P
DP2_M2C_N
A7
(1) D4 GBTCLK0_M2C_P
(1)
D5 GBTCLK0_M2C_N
NA
NA
NA NA
Device
FMC HPC0 J5
NA
NA
87
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