Xilinx ZCU102 User Manual page 124

set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN T6
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN T7
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN U8
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN U9
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN U6
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN V6
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN V7
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN V8
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN T11
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN U11
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN V11
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN V12
#HPC1 J4
set_property PACKAGE_PIN AF7
set_property IOSTANDARD
set_property PACKAGE_PIN AE7
set_property IOSTANDARD
set_property PACKAGE_PIN P9
set_property IOSTANDARD
set_property PACKAGE_PIN P10
set_property IOSTANDARD
set_property PACKAGE_PIN G28
set_property PACKAGE_PIN G27
set_property PACKAGE_PIN E28
set_property PACKAGE_PIN E27
set_property PACKAGE_PIN F30
set_property PACKAGE_PIN F29
set_property PACKAGE_PIN E32
set_property PACKAGE_PIN E31
set_property PACKAGE_PIN D30
set_property PACKAGE_PIN D29
set_property PACKAGE_PIN D34
set_property PACKAGE_PIN D33
set_property PACKAGE_PIN B30
set_property PACKAGE_PIN B29
set_property PACKAGE_PIN C32
set_property PACKAGE_PIN C31
set_property PACKAGE_PIN A32
set_property PACKAGE_PIN A31
set_property PACKAGE_PIN B34
set_property PACKAGE_PIN B33
set_property PACKAGE_PIN K30
set_property PACKAGE_PIN K29
set_property PACKAGE_PIN L32
set_property PACKAGE_PIN L31
ZCU102 Evaluation Board User Guide
UG1182 (v1.2) March 20, 2017
Appendix B:
[get_ports "FMC_HPC0_LA27_P"]
[get_ports "FMC_HPC0_LA28_N"]
[get_ports "FMC_HPC0_LA28_N"]
[get_ports "FMC_HPC0_LA28_P"]
[get_ports "FMC_HPC0_LA28_P"]
[get_ports "FMC_HPC0_LA29_N"]
[get_ports "FMC_HPC0_LA29_N"]
[get_ports "FMC_HPC0_LA29_P"]
[get_ports "FMC_HPC0_LA29_P"]
[get_ports "FMC_HPC0_LA30_N"]
[get_ports "FMC_HPC0_LA30_N"]
[get_ports "FMC_HPC0_LA30_P"]
[get_ports "FMC_HPC0_LA30_P"]
[get_ports "FMC_HPC0_LA31_N"]
[get_ports "FMC_HPC0_LA31_N"]
[get_ports "FMC_HPC0_LA31_P"]
[get_ports "FMC_HPC0_LA31_P"]
[get_ports "FMC_HPC0_LA32_N"]
[get_ports "FMC_HPC0_LA32_N"]
[get_ports "FMC_HPC0_LA32_P"]
[get_ports "FMC_HPC0_LA32_P"]
[get_ports "FMC_HPC0_LA33_N"]
[get_ports "FMC_HPC0_LA33_N"]
[get_ports "FMC_HPC0_LA33_P"]
[get_ports "FMC_HPC1_CLK0_M2C_N"]
LVDS [get_ports "FMC_HPC1_CLK0_M2C_N"]
[get_ports "FMC_HPC1_CLK0_M2C_P"]
LVDS [get_ports "FMC_HPC1_CLK0_M2C_P"]
[get_ports "FMC_HPC1_CLK1_M2C_N"]
LVDS [get_ports "FMC_HPC1_CLK1_M2C_N"]
[get_ports "FMC_HPC1_CLK1_M2C_P"]
LVDS [get_ports "FMC_HPC1_CLK1_M2C_P"]
[get_ports "FMC_HPC1_GBTCLK0_M2C_C_N"]
[get_ports "FMC_HPC1_GBTCLK0_M2C_C_P"]
[get_ports "FMC_HPC1_GBTCLK1_M2C_C_N"]
[get_ports "FMC_HPC1_GBTCLK1_M2C_C_P"]
[get_ports "FMC_HPC1_DP0_C2M_N"]
[get_ports "FMC_HPC1_DP0_C2M_P"]
[get_ports "FMC_HPC1_DP0_M2C_N"]
[get_ports "FMC_HPC1_DP0_M2C_P"]
[get_ports "FMC_HPC1_DP1_C2M_N"]
[get_ports "FMC_HPC1_DP1_C2M_P"]
[get_ports "FMC_HPC1_DP1_M2C_N"]
[get_ports "FMC_HPC1_DP1_M2C_P"]
[get_ports "FMC_HPC1_DP2_C2M_N"]
[get_ports "FMC_HPC1_DP2_C2M_P"]
[get_ports "FMC_HPC1_DP2_M2C_N"]
[get_ports "FMC_HPC1_DP2_M2C_P"]
[get_ports "FMC_HPC1_DP3_C2M_N"]
[get_ports "FMC_HPC1_DP3_C2M_P"]
[get_ports "FMC_HPC1_DP3_M2C_N"]
[get_ports "FMC_HPC1_DP3_M2C_P"]
[get_ports "FMC_HPC1_DP4_C2M_N"]
[get_ports "FMC_HPC1_DP4_C2M_P"]
[get_ports "FMC_HPC1_DP4_M2C_N"]
[get_ports "FMC_HPC1_DP4_M2C_P"]
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