Xilinx ZCU102 User Manual page 73

X-Ref Target - Figure 3-29
The J3 connector to MPSoC connections are listed in
Table 3-32: Prototype Header J3 Connections to the XCZU9EG MPSoC
XCZU9EG
Schematic Net Name
(U1) Pin
L12N_AD8N_50_N
J15
J16 L12N_AD8P_50_P
G16 L11N_AD9N_50_N
L11N_AD9P_50_P
H16
H14 L10N_AD10N_50_N
J14 L10N_AD10P_50_P
G14 L9N_AD11N_50_N
L9N_AD11P_50_P
G15
G13 L8N_HDGC_50_P
H13 L8N_HDGC_50_N
ZCU102 Evaluation Board User Guide
UG1182 (v1.2) March 20, 2017
Figure 3-29: Prototype Header J3
I/O Standard
LVCMOS33
LVCMOS33
LVCMOS33
LVCMOS33
LVCMOS33
LVCMOS33
LVCMOS33
LVCMOS33
LVCMOS33
LVCMOS33
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Chapter 3: Board Component Descriptions
Table 3-32.
Prototype
Header J3 Pin
14
16
18
20
6
8
10
12
22
24
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