Xilinx ZCU102 User Manual page 17

Table 2-3: Default Jumper Settings (Cont'd)
Jumper
Reset Sequencer PS_POR_B
J20 • OFF: No sequencer control of PS_POR_B
• 1-2: Sequencer can control PS_POR_B
Reset Sequencer PS_SRST_B
J21 • OFF: No sequence control of PS_SRST_B
• 1-2: Sequencer can control PS_SRST_B
Reset Sequencer inhibit
• OFF: Sequencer normal operation
J22
• 1-2: Sequencer inhibit (resets will stay
asserted)
ARM Debug VTREF
J14 • Open: VTREF floating
• 1-2: VTREF = VCCOPS3 (1.8V)
ARM Debug VSUPPLY
J15 • OFF: VSUPPLY floating
• 1-2: VSUPPLY = VCCOPS3 (1.8V)
VCCO_PSDDR_504 select
J56 • 1-2: Switched DDR4 VDDQ
• 3-4: Direct DDR4 VDDQ
DDR4 Reset Suspend Enable
J159 • 1-2: Suspend disabled (Gate bypass)
• 2-3: Suspend enabled
J16 SFP0 TX: 1-2:Disable; OFF: Enable
J17 SFP1 TX: 1-2:Disable; OFF: Enable
J42 SFP2 TX: 1-2:Disable; OFF: Enable
J54 SFP3 TX: 1-2:Disable; OFF: Enable
PCIe PRSNT select
• 1-2: x1
J162
• 3-4: x4
• 5-6: GND (not used)
USB ULPI CVBUS Select
J110 • 1-2: DEVICE or OTG Mode
• 2-3: Host Mode
USB ULPI ID select
J109 • 1-2: Connector ID
• 2-3: VDD33 ID
USB ULPI Shield GND select
J112 • 1-2: Capacitor
• 2-3: GND
ZCU102 Evaluation Board User Guide
UG1182 (v1.2) March 20, 2017
Function
www.xilinx.com
Chapter 2: Board Setup and Configuration
Figure 2-2 Schematic
Default
Callout Page
1-2 5
1-2 6
OFF 7
1-2 8
OFF 9
1-2 10
1-2 11
OFF 12
OFF 12
OFF 14
OFF 15
5-6 16
1-2 17
2-3 18
1-2 19
12
12
12
22
22
24
24
34
34
34
34
43
51
51
51
17
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