Xilinx ZCU102 User Manual page 30

Table 3-4: DDR4 Component Memory Connection to the XCZU9EG MPSoC (Cont'd)
XCZU9EG
(U1) Pin
AJ12
AK7
AJ7 DDR4_A14_WE_B
AJ9 DDR4_A16_RAS_B
AL5 DDR4_A15_CAS_B
AN7
AP7
AM3
AK8
AP1
AH9 DDR4_RESET_B_LS
AK9
AP2
AK4
AK5
AN4
AM4
AP4
AP5
AM5
AM6
AK2
AK3
AL1
AK1
AN1
AM1
AP3
AN3
AN6
AP6
AL3
AL2
ZCU102 Evaluation Board User Guide
UG1182 (v1.2) March 20, 2017
Net Name I/O Standard
DDR4_BA1 SSTL12_DCI
DDR4_BG0 SSTL12_DCI
SSTL12_DCI
SSTL12_DCI
SSTL12_DCI
DDR4_CK_T DIFF_SSTL12
DDR4_CK_C DIFF_SSTL12
DDR4_CKE SSTL12_DCI
DDR4_ACT_B SSTL12_DCI
DDR4_PAR SSTL12_DCI
LVCMOS18
DDR4_ODT SSTL12_DCI
DDR4_CS_B SSTL12_DCI
DDR4_DQ0 POD12_DCI
DDR4_DQ1 POD12_DCI
DDR4_DQ2 POD12_DCI
DDR4_DQ3 POD12_DCI
DDR4_DQ4 POD12_DCI
DDR4_DQ5 POD12_DCI
DDR4_DQ6 POD12_DCI
DDR4_DQ7 POD12_DCI
DDR4_DQ8 POD12_DCI
DDR4_DQ9 POD12_DCI
DDR4_DQ10 POD12_DCI
DDR4_DQ11 POD12_DCI
DDR4_DQ12 POD12_DCI
DDR4_DQ13 POD12_DCI
DDR4_DQ14 POD12_DCI
DDR4_DQ15 POD12_DCI
DDR4_DQS0_T DIFF_POD12
DDR4_DQS0_C DIFF_POD12
DDR4_DQS1_T DIFF_POD12
DDR4_DQS1_C DIFF_POD12
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Chapter 3: Board Component Descriptions
DDR4 Component Memory
Pin Number Pin Name
N8 BA1
M2 BG0
L2 WE_B/A14
L8 RAS_B/A16
M8 CAS_B/A15
K7 CK_T
K8 CK_C
K2 CKE
L3 ACT_B
T3 PAR
P1 RESET_B
K3 ODT
L7 CS_B
G2 DQL0
F7 DQL1
H3 DQL2
H7 DQL3
H2 DQL4
H8 DQL5
J3 DQL6
J7 DQL7
A3 DQU0
B8 DQU1
C3 DQU2
C7 DQU3
C2 DQU4
C8 DQU5
D3 DQU6
D7 DQU7
G3 DQSL_T
F3 DQSL_C
B7 DQSU_T
A7 DQSU_C
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