Xilinx ZCU102 User Manual page 63

Table 3-27: DPAUX/MIO Connections
XCZU9EG
Schematic Net Name
(U1) Pin
L21 MIO30_DP_AUX_IN
K22 MIO29_DP_OE
N21 MIO28_DP_HPD
M21 MIO27_DP_AUX_OUT
X-Ref Target - Figure 3-22
ZCU102 Evaluation Board User Guide
UG1182 (v1.2) March 20, 2017
Level Shifter U114
Pin Name Pin No.
2A1
1A2
2A2
1A1
Figure 3-22: DisplayPort Circuit
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Chapter 3: Board Component Descriptions
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