Xilinx ZCU102 User Manual page 42

The P6 connector to MPSoC connections are listed in
Table 3-11: Trace/Debug Conn. P6 Connections to the XCZU9EG MPSoC
XCZU9EG (U1)
Pin
L19
J21
H21
H18
H19
J17
H17
L18
G18
G19
F17
F18
E19
D19
E17
E18
K17
C18
A18
L17
K19
K18
B19
C17
C19
B18
D17
A17
For more information about managing the Zynq MPSoC extended MIO (EMIO) trace port
connections refer to the Zynq UltraScale+ MPSoC Technical Reference Manual (UG1085)
[Ref 2].
ZCU102 Evaluation Board User Guide
UG1182 (v1.2) March 20, 2017
Schematic Net
I/O Standard
Name
TRACEDATA0 LVCMOS33
TRACEDATA1
LVCMOS33
TRACEDATA2 LVCMOS33
TRACEDATA3 LVCMOS33
TRACEDATA4 LVCMOS33
TRACEDATA5
LVCMOS33
TRACEDATA6 LVCMOS33
TRACEDATA7 LVCMOS33
TRACEDATA8
LVCMOS33
TRACEDATA9
LVCMOS33
TRACEDATA1 LVCMOS33
TRACEDATA11 LVCMOS33
TRACEDATA12
LVCMOS33
TRACEDATA13 LVCMOS33
TRACEDATA14 LVCMOS33
TRACEDATA15 LVCMOS33
TRACECLKA
LVCMOS33
TRACERTCK LVCMOS33
TRACEDBGRQ LVCMOS33
TRACEDBGACK
LVCMOS33
TRACECTL LVCMOS33
TRACEEXTTRIG LVCMOS33
TRACETCK LVCMOS33
TRACETDI
LVCMOS33
TRACETDO LVCMOS33
TRACETMS LVCMOS33
TRACETRST_B LVCMOS33
TRACESRST_B
LVCMOS33
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Chapter 3: Board Component Descriptions
Table 3-11.
Trace/Debug P6
Pin
38
28
26
24
22
20
18
16
37
35
33
31
29
27
25
23
6
13
7
8
36
10
15
19
11
17
21
9
42
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