Xilinx ZCU102 User Manual page 122

set_property PACKAGE_PIN R4
set_property PACKAGE_PIN T1
set_property PACKAGE_PIN T2
set_property PACKAGE_PIN N3
set_property PACKAGE_PIN N4
set_property PACKAGE_PIN M1
set_property PACKAGE_PIN M2
set_property PACKAGE_PIN Y3
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN Y4
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN AC4
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN AB4
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN V1
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN V2
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN Y1
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN Y2
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN AA1
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN AA2
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN AC3
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN AB3
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN AC1
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN AC2
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN U4
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN U5
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN V3
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN V4
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN W1
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN W2
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN W4
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN W5
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN AB5
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN AB6
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN W6
set_property IOSTANDARD LVCMOS18
set_property PACKAGE_PIN W7
set_property IOSTANDARD LVCMOS18
ZCU102 Evaluation Board User Guide
UG1182 (v1.2) March 20, 2017
Appendix B:
[get_ports "FMC_HPC0_DP6_C2M_P"]
[get_ports "FMC_HPC0_DP6_M2C_N"]
[get_ports "FMC_HPC0_DP6_M2C_P"]
[get_ports "FMC_HPC0_DP7_C2M_N"]
[get_ports "FMC_HPC0_DP7_C2M_P"]
[get_ports "FMC_HPC0_DP7_M2C_N"]
[get_ports "FMC_HPC0_DP7_M2C_P"]
[get_ports "FMC_HPC0_LA00_CC_N"]
[get_ports "FMC_HPC0_LA00_CC_N"]
[get_ports "FMC_HPC0_LA00_CC_P"]
[get_ports "FMC_HPC0_LA00_CC_P"]
[get_ports "FMC_HPC0_LA01_CC_N"]
[get_ports "FMC_HPC0_LA01_CC_N"]
[get_ports "FMC_HPC0_LA01_CC_P"]
[get_ports "FMC_HPC0_LA01_CC_P"]
[get_ports "FMC_HPC0_LA02_N"]
[get_ports "FMC_HPC0_LA02_N"]
[get_ports "FMC_HPC0_LA02_P"]
[get_ports "FMC_HPC0_LA02_P"]
[get_ports "FMC_HPC0_LA03_N"]
[get_ports "FMC_HPC0_LA03_N"]
[get_ports "FMC_HPC0_LA03_P"]
[get_ports "FMC_HPC0_LA03_P"]
[get_ports "FMC_HPC0_LA04_N"]
[get_ports "FMC_HPC0_LA04_N"]
[get_ports "FMC_HPC0_LA04_P"]
[get_ports "FMC_HPC0_LA04_P"]
[get_ports "FMC_HPC0_LA05_N"]
[get_ports "FMC_HPC0_LA05_N"]
[get_ports "FMC_HPC0_LA05_P"]
[get_ports "FMC_HPC0_LA05_P"]
[get_ports "FMC_HPC0_LA06_N"]
[get_ports "FMC_HPC0_LA06_N"]
[get_ports "FMC_HPC0_LA06_P"]
[get_ports "FMC_HPC0_LA06_P"]
[get_ports "FMC_HPC0_LA07_N"]
[get_ports "FMC_HPC0_LA07_N"]
[get_ports "FMC_HPC0_LA07_P"]
[get_ports "FMC_HPC0_LA07_P"]
[get_ports "FMC_HPC0_LA08_N"]
[get_ports "FMC_HPC0_LA08_N"]
[get_ports "FMC_HPC0_LA08_P"]
[get_ports "FMC_HPC0_LA08_P"]
[get_ports "FMC_HPC0_LA09_N"]
[get_ports "FMC_HPC0_LA09_N"]
[get_ports "FMC_HPC0_LA09_P"]
[get_ports "FMC_HPC0_LA09_P"]
[get_ports "FMC_HPC0_LA10_N"]
[get_ports "FMC_HPC0_LA10_N"]
[get_ports "FMC_HPC0_LA10_P"]
[get_ports "FMC_HPC0_LA10_P"]
[get_ports "FMC_HPC0_LA11_N"]
[get_ports "FMC_HPC0_LA11_N"]
[get_ports "FMC_HPC0_LA11_P"]
[get_ports "FMC_HPC0_LA11_P"]
[get_ports "FMC_HPC0_LA12_N"]
[get_ports "FMC_HPC0_LA12_N"]
[get_ports "FMC_HPC0_LA12_P"]
[get_ports "FMC_HPC0_LA12_P"]
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