Xilinx ZCU102 User Manual page 94

The ZCU102 board FMC VADJ voltage VADJ_FMC_BUS for the J5 (HPC0) and J4 (HPC1) FMC
connectors is determined by the MAX15301 U63 voltage regulator described in
Board Power System, page
1.8V. The HPC0 J5 connections to XCZU9EG U1 are shown in
Table 3-44: J5 HPC0 FMC Section A and B Connections to XCZU9EG U1
J5 Pin Schematic Net Name
A2 FMC_HPC0_DP1_M2C_P
A3 FMC_HPC0_DP1_M2C_N
A6 FMC_HPC0_DP2_M2C_P
A7 FMC_HPC0_DP2_M2C_N
A10 FMC_HPC0_DP3_M2C_P
A11 FMC_HPC0_DP3_M2C_N
A14 FMC_HPC0_DP4_M2C_P
A15 FMC_HPC0_DP4_M2C_N
A18 FMC_HPC0_DP5_M2C_P
A19 FMC_HPC0_DP5_M2C_N
A22 FMC_HPC0_DP1_C2M_P
A23 FMC_HPC0_DP1_C2M_N
A26 FMC_HPC0_DP2_C2M_P
A27 FMC_HPC0_DP2_C2M_N
A30 FMC_HPC0_DP3_C2M_P
A31 FMC_HPC0_DP3_C2M_N
A34 FMC_HPC0_DP4_C2M_P
A35 FMC_HPC0_DP4_C2M_N
A38 FMC_HPC0_DP5_C2M_P
A39 FMC_HPC0_DP5_C2M_N
Notes:
1. Series capacitor coupled to XCZU9EG U1 pin.
ZCU102 Evaluation Board User Guide
UG1182 (v1.2) March 20, 2017
110. The valid values of the VADJ_FMC rail are 1.2V, 1.5V, and
I/O
U1 Pin J5 Pin
Standard
J4 B1
J3 B4
F2 B5
F1 B8
K2 B9
K1 B12
L4 B13
L3 B16
P2 B17
P1 B20
H6 B21
H5 B24
F6 B25
F5 B28
K6 B29
K5 B32
M6 B33
M5 B36
P6 B37
P5 B40
www.xilinx.com
Chapter 3: Board Component Descriptions
Table 3-44
Schematic Net Name
NC
NC
NC
NC
NC
FMC_HPC0_DP7_M2C_P
FMC_HPC0_DP7_M2C_N
FMC_HPC0_DP6_M2C_P
FMC_HPC0_DP6_M2C_N
FMC_HPC0_GBTCLK1_M2C_P
FMC_HPC0_GBTCLK1_M2C_N
NC
NC
NC
NC
FMC_HPC0_DP7_C2M_P
FMC_HPC0_DP7_C2M_N
FMC_HPC0_DP6_C2M_P
FMC_HPC0_DP6_C2M_N
NC
ZCU102
through Table 3-48.
I/O
U1 Pin
Standard
M2
M1
T2
T1
(1)
L8
(1)
L7
N4
N3
R4
R3
94
Send Feedback