Xilinx ZCU102 User Manual page 35

Table 3-7: USB Jumper Settings
Header Function
J7 V
BUS
J113 RV
BUS
J110 CV
BUS
J109 Cable ID select
J112 USB Micro-B
The connections between the USB 2.0 PHY at U116 and the XCZU9EG MPSoC are listed in
Table 3-8.
Table 3-8: USB 2.0 ULPI Transceiver Connections to the XCZU9EG MPSoC
XCZU9EG
(U1) Pin
(1)
U117.4
G23
E23
F22
B23
C23 MIO56_USB_DATA0
A23 MIO57_USB_DATA1
F23 MIO54_USB_DATA2
B24 MIO59_USB_DATA3
E24 MIO60_USB_DATA4
C24 MIO61_USB_DATA5
G24 MIO62_USB_DATA6
D24 MIO63_USB_DATA7
Notes:
1. PS_POR_B (U1.V23) or PS_MODE1 (DIP SW6.2) or PB SW2 drive U116 RST_B via OR
gate U117.
Note that the shield for the USB 3.0 micro-B connector (J96) can be tied to GND by a jumper
on header J96 pins 2-3 (default). The USB shield can optionally be connected through a
capacitor to GND by installing a capacitor (body size 0402) at location C887 and jumping
pins 1-2 on header J112.
ZCU102 Evaluation Board User Guide
UG1182 (v1.2) March 20, 2017
5V supply Shunt ON = Host or OTG mode
Shunt OFF = Device mode
select Position 1-2 = Device mode (10 kΩ)
Position 2-3 = OTG mode (1 kW)
select Position 1-2 = OTG and Device mode (1 mF)
Position 2-3 = Host mode (120 µF)
Position 1-2 = A/B cable detect
Position 2-3 = ID not used
Position 1-2 = Shield connected to GND
Position 2-3 = Shield floating
Net Name
Pin Number
ULPI0_RST_B
MIO58_USB_STP
MIO53_USB_DIR
MIO52_USB_CLK
MIO55_USB_NXT
www.xilinx.com
Chapter 3:
Shunt Position
USB3320 U116
Pin Name
27 RESET_B
29 STP
31 DIR
1 CLKOUT
2 NXT
3 DATA0
4 DATA1
5 DATA2
6 DATA3
7 DATA4
9 DATA5
10 DATA6
13 DATA7
Board Component Descriptions
Notes
Over voltage protection.
V load capacitance.
BUS
Used in OTG mode.
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