Xilinx ZCU102 User Manual page 127

set_property PACKAGE_PIN T12
set_property IOSTANDARD
set_property PACKAGE_PIN T10
set_property IOSTANDARD
set_property PACKAGE_PIN U10
set_property IOSTANDARD
set_property PACKAGE_PIN R13
set_property IOSTANDARD
set_property PACKAGE_PIN T13
set_property IOSTANDARD
set_property PACKAGE_PIN W11
set_property IOSTANDARD
set_property PACKAGE_PIN W12
set_property IOSTANDARD
#HDMI
set_property PACKAGE_PIN T34
set_property PACKAGE_PIN T33
set_property PACKAGE_PIN P34
set_property PACKAGE_PIN P33
set_property PACKAGE_PIN N32
set_property PACKAGE_PIN N31
set_property PACKAGE_PIN T30
set_property PACKAGE_PIN T29
set_property PACKAGE_PIN R32
set_property PACKAGE_PIN R31
set_property PACKAGE_PIN P30
set_property PACKAGE_PIN P29
set_property PACKAGE_PIN R28
set_property PACKAGE_PIN R27
set_property PACKAGE_PIN AG4
set_property IOSTANDARD
set_property PACKAGE_PIN AG5
set_property IOSTANDARD
set_property PACKAGE_PIN AG6
set_property IOSTANDARD
set_property PACKAGE_PIN AF6
set_property IOSTANDARD
set_property PACKAGE_PIN N28
set_property PACKAGE_PIN N27
set_property PACKAGE_PIN D14
set_property IOSTANDARD
set_property PACKAGE_PIN E14
set_property IOSTANDARD
set_property PACKAGE_PIN D15
set_property IOSTANDARD
set_property PACKAGE_PIN E15
set_property IOSTANDARD
set_property PACKAGE_PIN A15
set_property IOSTANDARD
set_property PACKAGE_PIN B15
set_property IOSTANDARD
set_property PACKAGE_PIN A16
set_property IOSTANDARD
set_property PACKAGE_PIN B16
set_property IOSTANDARD
set_property PACKAGE_PIN C16
set_property IOSTANDARD
set_property PACKAGE_PIN D16
ZCU102 Evaluation Board User Guide
UG1182 (v1.2) March 20, 2017
Appendix B:
[get_ports "FMC_HPC1_LA26_P"]
LVCMOS18 [get_ports "FMC_HPC1_LA26_P"]
[get_ports "FMC_HPC1_LA27_N"]
LVCMOS18 [get_ports "FMC_HPC1_LA27_N"]
[get_ports "FMC_HPC1_LA27_P"]
LVCMOS18 [get_ports "FMC_HPC1_LA27_P"]
[get_ports "FMC_HPC1_LA28_N"]
LVCMOS18 [get_ports "FMC_HPC1_LA28_N"]
[get_ports "FMC_HPC1_LA28_P"]
LVCMOS18 [get_ports "FMC_HPC1_LA28_P"]
[get_ports "FMC_HPC1_LA29_N"]
LVCMOS18 [get_ports "FMC_HPC1_LA29_N"]
[get_ports "FMC_HPC1_LA29_P"]
LVCMOS18 [get_ports "FMC_HPC1_LA29_P"]
[get_ports "HDMI_RX0_C_N"]
[get_ports "HDMI_RX0_C_P"]
[get_ports "HDMI_RX1_C_N"]
[get_ports "HDMI_RX1_C_P"]
[get_ports "HDMI_RX2_C_N"]
[get_ports "HDMI_RX2_C_P"]
[get_ports "HDMI_TX0_N"]
[get_ports "HDMI_TX0_P"]
[get_ports "HDMI_TX1_N"]
[get_ports "HDMI_TX1_P"]
[get_ports "HDMI_TX2_N"]
[get_ports "HDMI_TX2_P"]
[get_ports "HDMI_SI5324_OUT_C_N"]
[get_ports "HDMI_SI5324_OUT_C_P"]
[get_ports "HDMI_REC_CLOCK_C_N"]
LVDS [get_ports "HDMI_REC_CLOCK_C_N"]
[get_ports "HDMI_REC_CLOCK_C_P"]
LVDS [get_ports "HDMI_REC_CLOCK_C_P"]
[get_ports "HDMI_TX_LVDS_OUT_N"]
LVDS [get_ports "HDMI_TX_LVDS_OUT_N"]
[get_ports "HDMI_TX_LVDS_OUT_P"]
LVDS [get_ports "HDMI_TX_LVDS_OUT_P"]
[get_ports "HDMI_RX_CLK_C_N"]
[get_ports "HDMI_RX_CLK_C_P"]
[get_ports "HDMI_RX_PWR_DET"]
LVCMOS33 [get_ports "HDMI_RX_PWR_DET"]
[get_ports "HDMI_RX_HPD"]
LVCMOS33 [get_ports "HDMI_RX_HPD"]
[get_ports "HDMI_RX_CEC_SINK"]
LVCMOS33 [get_ports "HDMI_RX_CEC_SINK"]
[get_ports "HDMI_RX_SNK_SCL"]
LVCMOS33 [get_ports "HDMI_RX_SNK_SCL"]
[get_ports "HDMI_RX_SNK_SDA"]
LVCMOS33 [get_ports "HDMI_RX_SNK_SDA"]
[get_ports "HDMI_TX_EN"]
LVCMOS33 [get_ports "HDMI_TX_EN"]
[get_ports "HDMI_TX_CEC"]
LVCMOS33 [get_ports "HDMI_TX_CEC"]
[get_ports "HDMI_TX_HPD"]
LVCMOS33 [get_ports "HDMI_TX_HPD"]
[get_ports "HDMI_TX_SRC_SCL"]
LVCMOS33 [get_ports "HDMI_TX_SRC_SCL"]
[get_ports "HDMI_TX_SRC_SDA"]
www.xilinx.com
Master Constraints File Listing
Send Feedback
127