Checking The Configuration - Huawei Quidway S9300 Configuration Manual

Quidway S9300 Terabit Routing Switch
Configuration Guide - Device Management
The system view is displayed.
Step 2 Run:
clock priority priority source source { system | bits0 | bits1 }
By default, the priority of the inner clock source and system clock source is 254, and the priority
of other clock sources is 255. A smaller priority value indicates a higher priority.
The priority is set for a clock source.
l The number of the clock source for the system clock ranges from 0 to 8.
l The number of the clock source for the BITS clocks ranges from 5 to 9.
Table 11-4
Table 11-4 Mappings between the clock source numbers and clock sources
Clock No.
0
1
2
3
4
5
6
7
8
9
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11.5.3 Checking the Configuration

After configuring clock source selection based on priorities of clock sources, you can check the
configuration by using the following commands.
Prerequisite
The configurations of the clock source priority are complete.
Procedure
Step 1 Run the display clock mode command to view the mode of clock source selection.
Step 2 Run the display clock selection command to view the current clock sources of the external
clocks.
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Issue 03 (2011-12-29)
shows the mappings between the clock source numbers and clock sources.
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11 Ethernet Clock Syntonization Configuration
Clock Source
Inner Clock
BITS0
BITS1
Peer Board BITS0
Peer Board BITS1
Left Frame Clock
Right Frame Clock
FSU (reserved)
Peer Board FSU (reserved)
System Clock
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