Huawei Quidway S9300 Configuration Manual page 252

Quidway S9300 Terabit Routing Switch
Configuration Guide - Device Management
As shown in
or time signals to the device named Master, which serves as the master clock of the bearer
network and advertises the received clock or time signals to devices on the bearer network.
The BITS of the switch Master is connected to two-channel clock sources: BITS0 and BITS1.
BITS0 obtains a frequency signal through Ethernet synchronization and BITS1 obtains a time
signal through 1588v2. The switch synchronizes the time through Ethernet synchronization and
1588v2.
Figure 12-8 Networking diagram of configuring the BITS as the 1588v2 clock source
NodeB
The configuration roadmap is as follows:
1.
2.
3.
Data Preparation
To complete the configuration, you need the following data:
l
l
l
Procedure
Step 1 Connect Master to the BITS clock source, that is, BITS0, BTS1.
Step 2 Configure attributes for the input signals of the BITS clock.
Issue 03 (2011-12-29)
Figure 12-8, the BITS is connected to an external GPS to advertise the input clock
PE1
GE1/0/1
GE1/0/0
GE1/0/1
CE1
Connect Master to the BITS clock.
Configure attributes for the BITS clock.
Configure the BITS as the 1588v2 clock or time source.
BITS signal type
Attributes of the BITS time source, including time source value
Priority of the static clock source
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BITS
Master
GE1/0/0
PE3
GE1/0/2
GE1/0/0 GE1/0/0
GE1/0/0
GE1/0/1
12 PTP Configuration
PE2
GE1/0/1
GE1/0/0
GE1/0/1
CE2
NodeB
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