Example For Selecting The Clock Source Based On The Ssm Quality Level In Extended Mode - Huawei Quidway S9300 Configuration Manual

Quidway S9300 Terabit Routing Switch
Configuration Guide - Device Management
11.8.3 Example for Selecting the Clock Source Based on the SSM
Quality Level in Extended Mode
Networking Requirements
If the clock signal sent from the local device is sent back to the local device directly or through
the network, a timing loop occurs. In extended SSM mode, you can set IDs for the circuit or
external clock sources to prevent timing loops.
As shown in
clock. The Switches synchronize their clocks with the primary clock. Timing loops must be
prevented through configuration.
Figure 11-3 Networking diagram of clock syntonization
BITS
Configuration Roadmap
The configuration roadmap is as follows:
1.
2.
Data Preparation
To complete the configuration, you need the following data:
l
l
l
Issue 03 (2011-12-29)
Figure 11-3, three S9306s form a ring network. Switch C is connected to the primary
SwitchA
GE 2/0/0
Configure the primary clock as the input clock source of Switch A and set the ID of the
reference clock source.
Set the mode of clock source selection on Switch B and Switch C.
Mode of clock source selection
Priorities of clock sources
ID of the inner clock.
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11 Ethernet Clock Syntonization Configuration
GE 2/0/0
SwitchB
Normal clock synchronization
direction
Clock synchronization direction after signal
transmission between SwitchA and SwitchB fails.
SwitchC
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