Quidway S9300 Terabit Routing Switch
Configuration Guide - Device Management
The system view is displayed.
Step 2 Run:
interface interface-type interface-number
The interface view is displayed.
Step 3 Run:
clock left-frame priority
The priority of the clock signal that the interface sends to the main control board from the left
side of the frame is set.
Or run:
clock right-frame priority
The priority of the clock signal that the interface sends to the main control board from the right
side of the frame is set.
The default priority is 255.
The greater the value is, the lower the priority is.
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11.7.6 Locking a Clock Source
Context
By locking a clock source, you can prevent the clock source from being selected.
Do as follows on the S9300 where you need prevent a clock source from being selected.
Procedure
Step 1 Run:
system-view
The system view is displayed.
Step 2 Run:
clock lockout source source { system | bits0 | bits1 }
A clock source is locked and cannot be selected as the reference clock source.
By default, no clock is locked.
----End
11.7.7 Configuring Frequency Offset Check
Context
If the frequency offset of a clock source is out of the valid range, the clock source is considered
unavailable.
You affect the result of clock source selection by setting the valid range of frequency offset.
Issue 03 (2011-12-29)
Huawei Proprietary and Confidential
Copyright © Huawei Technologies Co., Ltd.
11 Ethernet Clock Syntonization Configuration
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