Huawei Quidway S9300 Configuration Manual page 219

Quidway S9300 Terabit Routing Switch
Configuration Guide - Device Management
synchronization is implemented through the exchange of 1588v2 packets. The slave clock
calculates its offset and delay comparing with the master clock according to the timestamp
information carried in the 1588v2 packet and then synchronizes its local clock to the master
clock.
A 1588v2 packet carries information about clock and time. As shown in
device reads and writes the timestamp carried in the 1588v2 packet on the link layer to calculate
the delay of each link segment. Compared with the Network Time Protocol (NTP), 1588v2
ensures a higher precision.
Figure 12-2 Timestamping in the 1588v2 packet
Timestamping
Applications of 1588v2
As shown in
through the Global Positioning System (GPS) into a 1588v2 packet, and provides the clock
information for the bearer network through the 1588v2 packet. As the core device of the bearer
network, TC transparently transmits the clock information provided by the OC to the entire
bearer network. After that, the edge devices of the bearer network function as BC and provide
the high-accurate clock information obtained through the 1588v2 packet to wireless access
devices, such as NodeB and RNC.
Issue 03 (2011-12-29)
PTP Aplication
IP
MA
C
PH
Y
Master Clock
Figure 12-3, OC encapsulates clock information with high accuracy obtained
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PTP Aplication
IP
MA
C
PH
Y
PTP Packet
Slave Clock
12 PTP Configuration
Figure 12-2, the 1588v2
Timestamping
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