Huawei Quidway S9300 Configuration Manual page 199

Quidway S9300 Terabit Routing Switch
Configuration Guide - Device Management
Figure 11-1 Networking diagram of clock syntonization
BITS
Configuration Roadmap
The configuration roadmap is as follows:
1.
2.
Data Preparation
To complete the configuration, you need the following data:
l
l
Procedure
Step 1 Verify that the clock of Switch A is the primary reference clock.
# Set the priority of the BITS0 clock on Switch A to 1.
<Quidway> system-view
[Quidway] sysname SwitchA
[SwitchA] clock priority 1 source 1 system
[SwitchA] display clock priority
Reference Clock Source
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0
1
2
Issue 03 (2011-12-29)
SwitchA
GE 2/0/0
Configure the BITS0 interface of Switch A to use the BITS clock as the input primary
reference clock.
Set the mode of clock source selection on Switch B and Switch C. Make sure that the priority
of the clock signals sent from the left side of the frame is higher than that of the clock
signals sent from the right side of the frame on each Switch.
Mode of clock source selection
Priorities of clock sources
Inner Clock
BITS0
BITS1
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11 Ethernet Clock Syntonization Configuration
GE 2/0/0
SwitchB
Normal clock synchronization
direction
Clock synchronization direction after signal
transmission between SwitchA and SwitchB fails.
System bits0
254 -
1 -
255 -
SwitchC
bits1
-
-
-
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