Motorola DSP96002 User Manual page 877

MPYU//ADD
Operation:
S1.L * S2.L D1.M:D1.L
(parallel data bus move)
S3.L + D2.L D2.L
Description:
Multiply the two unsigned operands S1 and S2 and store the product in the specified destination register
D1. The two source operands S1and S2 are 32-bit integers and are taken from the low portion of S1 and
S2. The result is a 64-bit unsigned integer stored in the middle and low portions of D1.
Simultaneously, add the low portion of the two operands S3 and D2 and store the result in the low portion
of the destination operand D2.
This instruction is enabled only in Integer Mode.
Input Operand(s) Precision: 32-bit integer.
Addition Output Operand Precision: 32-bit integer.
Multiplication Output Operand Precision: 64-bit integer.
CCR Condition Codes:
C
V
Z
N
I
LR
R
A
ER Status Bits:
IER Flags:
6
Integer Unsigned
Multiply and Add
- Set if carry is generated from the MSB of the addition result. Cleared otherwise.
- Set if the addition result overflows. Cleared otherwise.
- Set if result of the addition is zero. Cleared otherwise.
- Set if result of the addition is negative. Cleared otherwise.
- Not affected.
- Not affected.
- Not affected.
- Not affected.
Not affected
Not affected
Assembler Syntax:
MPYU S1,S2,D1 ADD S3,D2
(move syntax - see the MOVE instruction de-
scription.)
MPYU S2,S1,D1 ADD S3,D2
(move syntax - see the MOVE instruction de-
scription.)
MPYU//ADD
MOTOROLA