Motorola DSP96002 User Manual page 246

32-bit digital signal processor
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BSR
Operation:
PC
SSH; SR
SSL; PC+xx
PC
SSH; SR
SSL; PC+xxxx
PC
SSH; SR
SSL; PC+Rn
Description:
The address of the instruction immediately following the BSR instruction and the status register are pushed
onto the stack. Program execution then continues at location PC+displacement. The PC contains the ad-
dress of the next instruction. The displacement is a 2's complement 32-bit integer that represents the
relative distance from the current PC to the destination PC. Short Displacement, Long Displacement and
Address Register PC Relative addressing modes may be used. The Short Displacement 15-bit data is
sign extended to form the PC relative displacement. See Section A.10 for restrictions.
CCR Condition Codes: Not affected.
ER Status Bits: Not affected.
IER Flags: Not affected.
Instruction Format:
31
0000
0011
Instruction Format:
BSR
31
0000
0011
Instruction Format:
31
0000
0011
A - 58
Branch to Subroutine
PC
PC
PC
BSR
label (short)
11aa
aaaa
label
0100
001R
BSR
Rn
0100
0000
PC RELATIVE DISPLACEMENT
DSP96002 USER'S MANUAL
Assembler Syntax:
BSR
label (short)
BSR
label
BSR
Rn
14 13
aa
11
1111
14 13
11
1111
14 13
00
11
1111
BSR
0
0aaa
aaaa
0
0000
0000
0
0000
0000
MOTOROLA

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