Motorola DSP96002 User Manual page 296

FCMPG
Operation:
S2 - S1 (parallel data bus move)
Description:
Subtract the two operands as specified in the operation column above. No result is stored; however, the
condition codes are affected as described. This instruction differs from FSUB when S1=S2; in this case,
the result is always +0 and therefore, N is cleared. Note that this is true even if S1, S2 are infinity.
FCMPG and FCMP differ primarily in the definition of the CCR condition code bits LR and R. These differ-
ences are particularly useful in performing clipping operations in graphics applications. In the code seg-
ment, the FCMP instruction tests the first point of a line, X0, against X
MPG instruction tests the second point of a line, X1, against X
of LR. Note that the line segment will be trivially accepted if A is set (and R=1), whereas the line will be
–
trivially rejected if R is cleared (and A=0). This choice of accept/reject conditions was selected to permit
the CCR to be initialized by a single ORI instruction.
ORI #$E0,CCR
MOVE
FCMP D1, D0
FCMPG D1, D0
Input Operand(s) Precision: SEP Floating-Point.
Output Operand Precision: n.a.
A - 108
Graphics Compare
with Trivial Accept/Reject Flags
X:(R0)+N0,D0.S
X:(R0)-N0, D0.S
DSP96002 USER'S MANUAL
Assembler Syntax:
FCMPG S1,S2 (move syntax - see the MOVE in-
struction description.)
and sets LR according ly; the FC-
min
and sets – R depending on the condition
min
Y:(R4)+,D1.S
FCMPG
–
;SET A, R, LR – i. e.,
;assume line is initially
;accepted and not rejected.
;get X0, X
min
;X0-X , get X1
min
;X1=X
min
MOTOROLA