Motorola DSP96002 User Manual page 124

32-bit digital signal processor
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7.4.21.4
ICS Register Read
HICSR points to the slave ICS register (
ing instruction:
MOVE
7.4.21.5
ICS Register Write
HICSR points to the slave ICS register (
ing instruction:
MOVE
7.4.21.6
68K Interrupt Acknowledge Sequence
The MC680x0 interrupt acknowledge sequence is as follows:
1.
When there is a pending interrupt the 68K must first determine the starting location of the in-
terrupt service routine. The 68K supports the acquisition of this information with the interrupt
acknowledge cycle.
2.
The 68K interrupt controller generates in response the IACK signal to the interrupting device
(96K in this case), which is connected to the 96K — H – A pin.
3.
The interrupting device places the vector number on the bus in response to IACK signal from
the interrupt controller.
Figure 7-21 shows a flowchart of 68K interrupt acknowledge sequence.
7.4.21.7
IVR Register Read
In this example, the master and slave are two DSP96002s. HIVR points to the slave IVR register (
H
A=1, A5-A2=1100). The master executes the following instruction:
MOVE
7 - 38
H
S=0,
H
A=1, A5-A2=1000). The master executes the follow-
Y:HICSR,R0
H
S=0,
H
A=1, A5-A2=1000). The master executes the follow-
R0,Y:HICSR
Y:HIVR,R0
DSP96002 USER'S MANUAL
H
S=0,
MOTOROLA

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