Motorola DSP96002 User Manual page 133

7.5.3.1 DCS DMA Destination Space Control (DDS2-DDS0) Bits 0,1,2
The DMA Destination Space control bits (DDS2-DDS0) specify the memory or I/O space that will be refer-
enced as destination by the DMA. The DDS2-DDS0 bits are cleared by Hardware and Software Reset.
DDS2 DDS1 DDS0
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
7.5.3.2 DCS DMA Source Space Control (DSS2-DSS0) Bits 3,4,5
The DMA Source Space control bits (DSS2-DSS0) specify the memory or I/O space that will be referenced
as source by the DMA. The DSS2-DSS0 bits are cleared by Hardware and Software Reset.
DSS2 DSS1 DSS0
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
7.5.3.3 DCS Reserved Bits (Bits 6, 7, 15-22, 27, 29)
These bits read as zero and should be written with zero for future compatibility.
7.5.3.4 DCS DMA Request Masks (M0-M6) Bits 8-14
The DMA Request mask bits select the source of DMA requests used to trigger DMA transfers. If a mask
bit is set, the corresponding device is selected as the DMA request source. If the mask bit is cleared, the
device is ignored. The DMA request sources may be the internal peripherals or external devices requesting
— —
service through the I
triggered synchronous inputs. The mask bits are cleared by Hardware and Software Reset. The internal
DMA request sources are produced by ANDing the internal peripheral status bits with DE.
Each requesting device input is first individually ANDed with its respective mask bit (M0,M1,etc) and then
all AND outputs are ORed together. The OR output goes to the edge-triggered latch whose output initiates
MOTOROLA
DMA Destination Memory Space
Internal Program Memory
Internal X Data Memory
Internal Y Data Memory
Internal I/O (X Memory Space)
External Program Memory
External X Data Memory
External Y Data Memory
External I/O (Y Memory Space)
DMA Source Memory Space
Internal Program Memory
Internal X Data Memory
Internal Y Data Memory
Internal I/O (X Memory Space)
External Program Memory
External X Data Memory
External Y Data Memory
External I/O (Y Memory Space)
— – – — — –
R Q A, I R Q B and
DSP96002 USER'S MANUAL
– — — –
I R Q C pins. The external inputs behave as edge-
7 - 47