Motorola DSP96002 User Manual page 862

PFLUSH
Operation:
Flush instruction cache
Description:
Flush the whole instruction cache, unlock all cache sectors, set the LRU stack and tag registers to their
default values.
The PFLUSH instruction is enabled both in Cache Mode and PRAM Mode.
CCR Condition Codes: Not affected.
ER Status Bits: Not affected.
IER Flags: Not affected.
Instruction Format: PFLUSH
31
0000 0000
Instruction Fields:
None
Timing: 2 oscillator clock cycles
Memory: 1 program words
10
Program-Cache Flush
0000 0000
Assembler Syntax:
PFLUSH
14 13
00 00 0000
PFLUSH
0
0000 0011
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