Motorola DSP96002 User Manual page 499

WAIT
Operation:
Enter WAIT processing state and stop all internal processing.
Wait for an unmasked interrupt to occur.
Description:
When a WAIT instruction is executed, the processor enters the WAIT state. The internal clocks to the pro-
cessor core, memories, and DMA are gated off and all activity in the processor is suspended until an un-
masked interrupt occurs. However the clock oscillator and the internal I/O peripheral clocks remain active.
If WAIT is executed when an interrupt is pending, the interrupt will be processed; the effect will be the same
as if the processor never entered the WAIT state and three NOPs followed the WAIT instruction. When an
unmasked interrupt or external (hardware) processor RESET occurs, the processor leaves the WAIT state.
The WAIT state is then cleared and exception processing of the unmasked interrupt or RESET condition
— – —
begins. The B R/
standby mode. The processor always leaves the WAIT state in the T2 clock phase (see the DSP96002 Ad-
vance Information Data Sheet (DSP96002/D)). Therefore, multiple processors may be synchronized by
having them all enter the WAIT state and then interrupting them with a common interrupt.
CCR Condition Codes: Not affected.
ER Status Bits: Not affected.
IER Flags: Not affected.
Instruction Format: WAIT
31
0000 0000
Instruction Fields:
None
Timing: n/a
Memory: 1 program words
MOTOROLA
Wait for Interrupt
–
B G circuits remain active during the WAIT state. The WAIT state is a low-power
0000 0000
DSP96002 USER'S MANUAL
14 13
00 00 0000
WAIT
Assembler Syntax:
WAIT
0
0000 1110
A - 311