Motorola DSP96002 User Manual page 257

CMPG
Operation:
S2.L - S1.L (parallel data bus move)
Description:
Subtract the low portion of the two operands as specified in the operation column above. No result is
stored; however, the condition codes are affected as described below.
CMPG and CMP differ primarily in the definition of the CCR condition code bits LR and R. These differenc-
es are particularly useful in performing clipping operations in graphics applications. In the code segment,
the CMP instruction tests the first point of a line, X0, against X
instruction tests the second point of a line, X1, against X
Note that the line segment will be trivially accepted if A is set (and R=1), whereas the line will be trivially
–
rejected if R is cleared (and A=0). This choice of accept/reject conditions was selected to permit the CCR
to be initialized by a single ORI instruction.
ORI #$E0,CCR
MOVE
CMP D1, D0
CMPG D1, D0
Input Operand(s) Precision: 32-bit 2's complement integer.
Output Operand Precision: n.a.
CCR Condition Codes:
C
V
Z
N
I
LR
–
R
MOTOROLA
Graphics Compare with Trivial
Accept/Reject Flags
X:(R0)+N0,D0.L
X:(R0)-N0, D0.L
- Set if result is negative without overflow. Set if result is positive with overflow.
Cleared otherwise.
- Set if result overflows. Cleared otherwise.
- Set if result is zero. Cleared otherwise.
- Set if result is negative. Cleared otherwise.
- Not affected.
- Always set (initialize for the next CMP, CMPG combination; see the example for
the FCMPG instruction.
- Cleared if LR was set and result is negative without overflow. Cleared if LR was set
and result is positive with overflow. Not affected otherwise. See the example for
the FCMPG instruction.
DSP96002 USER'S MANUAL
Assembler Syntax:
CMPG S1,S2
(move syntax - see the MOVE instruction de-
scription.)
and sets LR according ly; the FCMPG
min
–
and sets R depending on the condition of LR.
min
Y:(R4)+,D1.S
CMPG
–
;SET A, R, LR – i. e.,
;assume line is initially
;accepted and not rejected.
;get X0, X
min
;X0-X , get X1
min
;X1=X
min
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