Motorola DSP96002 User Manual page 403

32-bit digital signal processor
Table of Contents

Advertisement

LRA
LRA
Operation:
PC+Rn
D
Description:
The PC is added to the specified displacement and the result is stored in destination D. The PC contains
the address of the next instruction. The displacement is a 2's complement 32-bit integer that represents
the relative distance from the current PC to the destination PC. Long Displacement and Address Register
PC Relative addressing modes may be used. See Section A.10 for restrictions. Note that if D is SSH,
the SP will be preincremented by one.
See restrictions in Section A.10.6 concerning Rn, Mn, and Nn registers as a
destination.
CCR Condition Codes:
For destination operand SR:
C
V
Z
N
I
LR
R
A
For destination operands other than SR:
C
V
Z
N
I
LR
R
A
MOTOROLA
Load PC Relative Address
- Set according to bit 0 of the source operand.
- Set according to bit 1 of the source operand.
- Set according to bit 2 of the source operand.
- Set according to bit 3 of the source operand.
- Set according to bit 4 of the source operand.
- Set according to bit 5 of the source operand.
- Set according to bit 6 of the source operand.
- Set according to bit 7 of the source operand.
- Not affected.
- Not affected.
- Not affected.
- Not affected.
- Not affected.
- Not affected.
- Not affected.
- Not affected.
DSP96002 USER'S MANUAL
Assembler Syntax:
LRA
Rn,D
LRA
label,D
CAUTION
A - 215

Advertisement

Table of Contents
loading

Table of Contents