Motorola DSP96002 User Manual page 237

32-bit digital signal processor
Table of Contents

Advertisement

BScc
Branch to Subroutine Conditionally
Operation:
If cc, then PC
SSH; SR
else
If cc, then PC
SSH; SR
else
If cc, then PC
SSH; SR
else
Description:
If the specified condition is true, the address of the instruction immediately following the BScc instruction
and the status register are pushed onto the stack. Program execution then continues at location PC+dis-
placement. The PC contains the address of the next instruction. If the specified condition is false, the PC
is incremented and program execution continues sequentially. The displacement is a 2's complement 32-
bit integer that represents the relative distance from the current PC to the destination PC. Short Displace-
ment, Long Displacement and Address Register PC Relative addressing modes may be used. The Short
Displacement 15-bit data is sign extended to form the PC relative displacement. See Section A.10 for
restrictions.
"cc" may specify the following conditions:
Mnemonic
CC (HS) - carry clear (higher or same)
CS (LO) - carry set (lower)
EQ
GE
GT
HI
LE
LS
LT
MI
NE(Q)
PL
VC
VS
CCR Condition Codes: Not affected.
MOTOROLA
SSL; PC+xx
PC + 1
SSL; PC+xxxx
PC + 1
SSL; PC+Rn
PC + 1
- equal
- greater or equal
- greater than
- higher
- less or equal
- lower or same
- less than
- minus
- not equal
- plus
- overflow clear
- overflow set
DSP96002 USER'S MANUAL
Assembler Syntax:
PC
BScc
PC
PC
BScc
PC
PC
BScc
PC
Condition
C = 0
C = 1
Z = 1
N && V = 0
Z v (N && V) = 0
Z v C = 0
Z v (N && V) = 1
Z v C = 1
N && V = 1
N = 1
Z = 0
N = 0
V = 0
V = 1
BScc
label (short)
label
Rn
A - 49

Advertisement

Table of Contents
loading

Table of Contents