Motorola DSP96002 User Manual page 174

32-bit digital signal processor
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Figure 10-5. Data Memory Breakpoint Logic
dress is ignored. Program memory address breakpoints occur after the opcode or operand is executed and
the breakpoint counter has been decremented to zero.
Data memory address breakpoints also occur after the execution of the instruction which formed the data
memory address and the breakpoint counter has decremented to zero.
All breakpoint registers are controlled by the debug status and control register, OSCR.
10.4.2 Breakpoint Counter
The breakpoint counter is useful for stopping at the nth iteration of a program loop or when the nth occur-
rence of a data memory access occurs. This information significantly decreases algorithm debug time and
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DSP96002 USER'S MANUAL
MOTOROLA

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