Table of Contents
Advertisement
CLR
Operation:
0
D.L
(parallel data bus move)
Description:
The low portion of the destination operand is cleared to zero. This instruction is implemented by executing
ANDC D,D.
Input Operand(s) Precision: 32-bit integer.
Output Operand Precision: 32-bit integer.
CCR Condition Codes:
C
V
Z
N
I
LR
–
R
A
ER Status Bits: Not affected.
IER Flags: Not affected.
Instruction Format: CLR
31
DATA BUS MOVE FIELD
OPTIONAL EFFECTIVE ADDRESS EXTENSION OR IMMEDIATE LONG DATA
Instruction Fields:
D
Dn.L
Timing: 2 + mv oscillator clock cycles
Memory: 1 + mv program words
A - 66
Clear an Operand
- Not affected.
- Always cleared.
- Always set.
- Always cleared.
- Not affected.
- Not affected.
- Not affected.
- Not affected.
D
(move syntax - see the MOVE instruction description.)
(u u u)
d d d
n n n
where nnn = 0-7
DSP96002 USER'S MANUAL
Assembler Syntax:
CLR
D
(move syntax - see the MOVE instruction
description.)
14 13
11
0uuu
CLR
0
1000
1ddd
MOTOROLA
Advertisement
Table of Contents
