Motorola DSP96002 User Manual page 388

32-bit digital signal processor
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JScc
Jump to Subroutine Conditionally
Operation:
If cc, then PC
SSH; SR
else PC + 1
PC
If cc, then PC
SSH; SR
else PC + 1
PC
Description:
If the specified condition is true, the address of the instruction immediately following the JScc instruction
and the status register are pushed onto the stack. Program execution then continues at the effective ad-
dress in program memory. If the specified condition is false, the PC is incremented and any extension
word is ignored. However, the address register specified in the effective address field is always updated
independently of the condition. All memory alterable addressing modes may be used for the effective ad-
dress. A fast Short Jump addressing mode may also be used. The 15-bit data is sign extended to form
the effective address. See Section A.10 for restrictions.
"cc" may specify the following conditions:
Mnemonic
CC (HS) - carry clear (higher or same)
CS (LO) - carry set (lower)
EQ
GE
GT
HI
LE
LS
LT
MI
NE(Q)
PL
VC
VS
CCR Condition Codes: Not affected.
ER Status Bits: Not affected.
IER Flags: Not affected.
A - 200
SSL; xx
PC
SSL; ea
PC
- equal
- greater or equal
- greater than
- higher
- less or equal
- lower or same
- less than
- minus
- not equal
- plus
- overflow clear
- overflow set
DSP96002 USER'S MANUAL
Assembler Syntax:
JScc
label (short)
JScc
ea
Condition
C = 0
C = 1
Z = 1
N && V = 0
Z v (N && V) = 0
Z v C = 0
Z v (N && V) = 1
Z v C = 1
N && V = 1
N = 1
Z = 0
N = 0
V = 0
V = 1
JScc
MOTOROLA

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