Motorola DSP96002 User Manual page 730

32-bit digital signal processor
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95 94 93 92
75 74
S U V
Z
Dn.h
-126
-1.0
2
Figure C-6. Tiny Numbers on the Real Number Line
specific operation to occur. The result of an invalid operation is a QNaN, as described above.
Examples of invalid operations are 0/0,
2. Division by zero: The result of a division by zero is an infinity (with the correct sign), and the
operation is signaled as an exception.
3. Overflow: The overflow exception is signaled when the result of an operation exceeds the larg-
est magnitude that the result precision can accommodate. The result generated by the hard-
ware is dependent upon the rounding mode. For round to nearest, an infinity with correct
sign is generated. Round to zero results in the largest possible numerical value the result pre-
cision can accommodate, with correct sign (i. e., the result saturates). Round to - results in
the largest possible numerical value the result precision can accommodate (i. e., the result sat-
urates) when the overflow is positive. It results in - when the overflow is negative. Round to
+ results in + when the overflow is positive, and in the largest negative numerical value the
result precision can accommodate (i. e., the result saturates) when the overflow is negative.
4. Underflow: Underflow is signaled when both (1) a very small (tiny) number is detected as the
95 94 93 92
75 74
S U V
Z
Dn.h
MOTOROLA
64
63 62
e
Fraction (MSBs)
i
Dn.m
S : sign
U : single precision unnormalized tag
V : double precision unnormalized
i : explicit integer
Figure C-5. DP Format in the Data ALU
Tiny SP Numbers between +2
64
63 62
e
i
Figure C-7. SEP Format in the Data ALU
DSP96002 USER'S MANUAL
32 31
E min
,Exclusive
0
, 0
, etc.
32 31
Fraction
Dn.m
11 10
Fraction (LSBs)
Dn.l
-126
+1.0
2
11 10
0
Dn.l
0
Z
0
Z
C-7

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