Motorola DSP96002 User Manual page 382

JCLR
Operation:
If S{n} = 0, then xxxx
else PC + 1
If S{n} = 0, then xxxx
else PC + 1
If S{n} = 0, then xxxx
else PC + 1
If S{n} = 0, then xxxx
else PC + 1
If S{n} = 0, then xxxx
else PC + 1
If S{n} = 0, then xxxx
else PC + 1
If S{n} = 0, then xxxx
else PC + 1
Description:
The nth bit in the source operand is tested. If the tested bit is zero, program execution continues at a lo-
cation specified by a 32-bit absolute address in the extension word of the instruction. Otherwise, the PC
is incremented and the extension word is ignored. However, the address register specified in the effective
address field is always updated independently of the condition. All memory alterable addressing modes
may be used to reference the source operand. Absolute Short, I/O Short and Register Direct addressing
modes may also be used. The bit to be tested is selected by an immediate bit number 0-31. See Section
A.10 for restrictions. Note that if the specified source operand S is the SSH, the stack pointer register will
be decremented by one.
CCR Condition Codes: Not affected.
ER Status Bits: Not affected.
IER Flags: Not affected.
A - 194
Jump if Bit Clear
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
DSP96002 USER'S MANUAL
Assembler Syntax:
JCLR #bit,X: ea, label
JCLR #bit,X: aa, label
JCLR #bit,X: pp, label
JCLR #bit,Y: ea, label
JCLR #bit,Y: aa, label
JCLR #bit,Y: pp, label
JCLR #bit,S,label
JCLR
MOTOROLA