Motorola DSP96002 User Manual page 494

32-bit digital signal processor
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SUBC
Operation:
D.L - S.L - C
D.L (parallel data bus move)
Description:
Subtract the low portion of the specified source operand S from the low portion of the destination operand
D along with the C bit of the condition code register and store the result in the low portion of D. This in-
struction is useful in multiple precision integer arithmetic routines. Note that the higher precision long words
of the input variables must be moved to the low portion of the Dn.
Input Operand(s) Precision: 32-bit integer.
Output Operand Precision: 32-bit integer.
CCR Condition Codes:
C
- Set if a borrow is generated from the MSB of the result. Cleared otherwise.
V
- Set if result overflows. Cleared otherwise.
Z
- Cleared if the result is not zero. Unchanged otherwise.
N
- Set if result is negative. Cleared otherwise.
I
- Not affected.
LR
- Not affected.
R
- Not affected.
A
- Not affected.
ER Status Bits: Not affected.
IER Flags: Not affected.
Instruction Format: SUBC
31
DATA BUS MOVE FIELD
OPTIONAL EFFECTIVE ADDRESS EXTENSION OR IMMEDIATE LONG DATA
Instruction Fields:
D
Dn.L
S
Dn.L
Timing: 2 + mv oscillator clock cycles
Memory: 1 + mv program words
A - 306
Subtract with Carry
S,D (move syntax - see the Move instruction description.)
(u u)
d d d
n n n
where nnn = 0-7
s s s
n n n
where nnn = 0-7
DSP96002 USER'S MANUAL
Assembler Syntax:
SUBC
S,D
(move syntax - see the Move instruction de-
scription.)
14 13
00
1sss
SUBC
0
uu10
1ddd
MOTOROLA

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