Motorola DSP96002 User Manual page 366

32-bit digital signal processor
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FTST
Operation:
S - 0
(parallel data bus move)
Description:
Compare the specified operand with zero. No result is stored, however, the condition codes are affected
as described.
Input Operand(s) Precision: SEP Floating-Point.
Output Operand Precision: n.a.
CCR Condition Codes:
Note: Since there is no destination, there is no rounding and therefore the condition code bits are set as-
suming an infinite precision result.
C
V
Z
N
I
LR
R
A
ER Status Bits:
INX
DZ
UNF
OVF
OPERR-Always cleared.
SNAN -Set if operand is a signaling NaN. Cleared otherwise.
NAN
UNCC -Always cleared.
IER Flags: Flags changed according to standard definition.
A - 178
Test a Floating-Point Operand
- Not affected.
- Not affected.
- Set if result is zero. Cleared otherwise.
- Set if result is negative. Cleared otherwise.
- Set if result is infinity. Cleared otherwise.
- Not affected.
- Not affected.
- Not affected.
-Always cleared.
-Always cleared.
-Always cleared.
-Always cleared.
-Set if result is a NaN. Cleared otherwise.
DSP96002 USER'S MANUAL
Assembler Syntax:
FTST
S
(move syntax - see the Move instruction description.)
FTST
MOTOROLA

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