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7.2.1.3
BCRx Reserved bits (Bits 20, 21)
These reserved bits read as zero and should be written with zero for future compatibility.
7.2.1.4
BCRx Non-Sequential Fault Enable (NS) Bit 22
Non-sequential fault detection is enabled if the NS control bit is set. Non-sequential faults are ignored by
the page circuit if the NS control bit is cleared. See Section 7.2.2 on Page Circuit Operation. Cleared by
hardware reset.
7.2.1.5
BCRx Bus Mastership Fault Enable (MF) Bit 23
Bus mastership fault detection is enabled if the MF control bit is set. Bus mastership faults are ignored by
the page circuit if the MF control bit is cleared. See Section 7.2.2 on Page Circuit Operation. Cleared by
hardware reset.
7.2.1.6
BCRx Memory Space Fault Enable (SF1-SF0) Bits 24-25
Memory space faults based on changes in S1 and/or S0 are enabled by SF1 and SF0, respectively. If
SF1(SF0) is set, changes in S1(S0) will cause a memory space fault. If SF1(SF0) is cleared, changes in
S1(S0) are ignored by the page circuit. See Section 7.2.2 on Page Circuit Operation. SF1 and SF0 are
cleared by hardware reset.
7.2.1.7
BCRx Program Memory Fault Enable (PE) Bit 26
If the Program Memory Fault Enable bit PE is set, the page fault circuit will monitor program memory bus
cycles. If PE is set and a fault is detected during a program memory bus cycle,
PE is set and no fault is detected during a program memory bus cycle,
cleared, the page fault circuit will be inactive for program memory bus cycles and
serted. PE is cleared by hardware reset.
PE
0
1
7.2.1.8
BCRx Y Data Memory Fault Enable (YE) Bit 27
If the Y Data Memory Fault Enable bit YE is set, the page fault circuit will monitor Y Data memory bus cycles.
If YE is set and a fault is detected during a Y Data memory bus cycle,
and no fault is detected during a Y Data memory bus cycle,
page fault circuit will be inactive for Y Data memory bus cycles and
cleared by hardware reset.
YE
0
1
MOTOROLA
—
–
T
T Pin Activity for P Space
Deasserted
Active
— T – T Pin Activity for Y Space
Deasserted
Active
DSP96002 USER'S MANUAL
—
–
T
T will be deasserted. If
—
–
T
T will be asserted. If PE is
—
T
—
–
T
T will be deasserted. If YE is set
—
–
T
T will be asserted. If YE is cleared, the
—
–
T
T will remain deasserted. YE is
–
T will remain deas-
7 - 3
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