Motorola DSP96002 User Manual page 290

32-bit digital signal processor
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"cc" may specify the following conditions:
Mnemonic
EQ
ERR
GE
GL
GLE
GT
INF
LE
LT
MI
NE(Q) - not equal
NGE
NGL
NGLE - not(greater, less or equal)NAN = 1Yes
NGT
NINF - not infinity
NLE
NLT
OR
PL
UN
Note: The operands for the ERR condition are taken from the ER register.
* See description of UNcc bit in Section A.4.
CCR Condition Codes: Not affected.
ER Status Bits:
INX
DZ
UNF
OVF
OPERR- Not affected.
SNAN - Not affected.
NAN
UNCC -Set if NAN is set and a non-aware floating-point condition is tested ("cc" conditions
IER Flags:
SINX
SDZ
SUNF - Not affected.
SOVF - Not affected.
SIOP
A - 102
- equal
- error
- greater than or equal
- greater or less than
- greater, less or equal
- greater than
- infinity
- less than or equal
- less than
- minus
- not(greater than or equal) NAN v (N & ~Z) = 1
- not(greater or less than)
- not greater than
- not(less than or equal)
- not less than
- ordered
- plus
- unordered
- Not affected.
- Not affected.
- Not affected.
- Not affected.
- Not affected.
marked "YES" above). Not affected otherwise.
- Not affected.
- Not affected.
- Set if NAN is set and a non-aware floating-point condition is tested ("cc" conditions
marked "YES" above). Not affected otherwise.
DSP96002 USER'S MANUAL
Condition
Z = 1
UNCC v SNAN v OPERR v No
OVF v UNF v DZ = 1
NAN v (N & ~Z) = 0
NAN v Z = 0
NAN = 0
NAN v Z v N = 0
I = 1
NAN v ~(N v Z) = 0
NAN v Z v ~N = 0
N = 1
Z = 0
NAN v Z = 1
NAN v Z v N = 1
I = 0
NAN v ~(N v Z) = 1
NAN v Z v ~N = 1
NAN = 0
N = 0
NAN = 1
Non-aware*
Set UNCC
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
MOTOROLA

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