Motorola DSP96002 User Manual page 30

32-bit digital signal processor
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Figure 3-2. Data ALU Block Diagram Data ALU Register File (D0-D9)
The registers may also be treated as thirty 32-bit registers Dn.H, Dn.M, Dn.L, n=0,1,..,9. Each register may
be read or written over the XDB or YDB as a word operand. When an individual 32-bit register is written
over the XDB or YDB, no format conversion takes place and only the designated register is affected. The
low portion of the registers, Dn.L, is used as source and/or destination for most integer operations. In this
case the integer registers supply an operand for the Multiplier and the Adder/Subtracter while receiving an
input from the Multiplier and the Adder/subtracter. Note that in the case of integer multiplication the result
will be 64-bits wide and will be stored in both middle and low portions of the destination register.
3.3.1 Multiply Unit
The Multiplier is one of the two arithmetic processing units of the Data ALU and performs all the floating-
point multiplications as well as signed/unsigned fixed-point (integer) multiplications on the data operands.
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DSP96002 USER'S MANUAL
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