Motorola DSP96002 User Manual page 477

32-bit digital signal processor
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REP
REP
Operation:
LC
TEMP; X:<ea>
Repeat next instruction until LC = 1.
TEMP
LC
LC
TEMP; Y:<ea>
Repeat next instruction until LC = 1.
TEMP
LC
LC
TEMP; S
LC
Repeat next instruction until LC = 1.
TEMP
LC
LC
TEMP; #xxx
LC
Repeat next instruction until LC = 1.
TEMP
LC
Description:
The single word instruction following the REP instruction is executed LC times repetitively, where LC is the
value in the loop counter. If LC=0, the instruction is repeated 2 ** 32 times. The current loop counter (LC)
value is stored in an internal temporary register. The effective address specifies the address of the repeat
count which is loaded into LC. All address register indirect addressing modes except Long Displacement
may be used. Immediate Short and Register Direct addressing modes may also be used. The 19-bit im-
mediate data is zero extended to form the loop counter value.
When the REP instruction is in effect, the repeated instruction is fetched only once and remains in the in-
struction register for the duration of the repeat count.
REP is not interruptible and can repeat any single word instruction which does not change program flow.
See Section A.10 for the complete list of restricted instructions.
If the system stack register SSH is specified as a source operand, the system stack pointer SP is postdec-
remented by 1 after SSH is read.
CCR Condition Codes: Not affected.
ER Status Bits: Not affected.
IER Flags: Not affected.
MOTOROLA
Repeat Next Instruction
LC
LC
DSP96002 USER'S MANUAL
Assembler Syntax:
REP
X: ea
REP
Y: ea
REP
S
REP
#Count
A - 289

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