Motorola DSP96002 User Manual page 103

7 6
HREQ INIT TYEQ TREQ RREQ TRDY TXDE RXDF
15 14
HMRC **
31
** ** ** ** ** ** ** ** ** ** ** ** **
31
** ** ** ** ** **
31
** ** ** ** ** **
31
** ** ** ** ** ** ** ** **
31
31
** - reserved, read as zero, should be written with zero
for future compatibility.
Figure 7-11. HI - Host Processor Programming Model
7.4.7 Host Receive Data Register (HRX) - DSP96002 Side
The Host Receive Data register (HRX) is used for host processor to DSP96002 data transfers. The HRX
register is viewed as a 32-bit read-only register by the DSP96002. The HRX register is loaded with 32-bit
data from the TX register when both the Transmit Data Register Empty TXDE and Host Receive Data Full
HRDF bits are cleared. This transfer operation sets TXDE and HRDF. The HRX register contains valid data
when the HRDF bit is set. Reading HRX clears HRDF. The DSP96002 may program the HRIE bit to cause
a Host Receive Data interrupt when HRDF is set.
MOTOROLA
5 4 3 2
13 12 11 10
HRST DMAE HF3 HF2
16 15
SEM15 - SEM0
SEMAPHORE
16 15 14 8 7
HC **
8 7
RX
TX
DSP96002 USER'S MANUAL
1 0
READ/WRITE
9 8 INTERRUPT CONTROL/STATUS
HF1 HF0 REGISTER
ICS
16
0
READ/WRITE
REGISTER
SEM
0
HV READ/WRITE
COMMAND VECTOR
REGISTER
CVR
0
IV7-IV0 READ/WRITE
INTERRUPT VECTOR
REGISTER
IVR
0
READ-ONLY
RECEIVE DATA
REGISTER
RX
0
WRITE-ONLY
TRANSMIT DATA
REGISTER
TX
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