Motorola DSP96002 User Manual page 44

32-bit digital signal processor
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31
30
29
LF
I1
*
23
22
21
R1
R0
*
15
14
13
UN
S
CC
NAN
NAN
7
6
5
A
R
LR
MOTOROLA
28
27
26
I0
FZ
MP
20
19
18
SIOP
SOVF SUNF SDZ
12
11
10
OP
ERR
OVF
UNF
4
3
2
I
N
Z
Figure 4-3. SR Format
DSP96002 USER'S MANUAL
25
24
*
*
MR
17
16
SINX
IER
9
8
DZ
INX
ER
1
0
V
C
CCR
Reserved
Multiply
Flush to Zero
Interrupt Mask
Reserved
Loop Flag
IEEE Inexact
IEEE Divide-by Zero
IEEE Underflow
IEEE Overflow
IEEE Invalid Operation
Rounding Mode
Reserved
Inexact
Divide-by Zero
Underflow
Overflow
Operand error
Signaling NaN
Not-A-Number
Unordered Condition
Carry
Overflow
Zero
Negative
Infinity
Local Reject
Reject
Accept
4 - 5

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