Condition Code Computation - Motorola DSP96002 User Manual

32-bit digital signal processor
Table of Contents

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Addressing Mode
Data or Control Register
Address Register
Address Offset Register
Address Modifier Register
No Update
Postincrement by 1
Postdecrement by 1
Postincrement by Offset Nn
Postdecrement by Offset Nn
Indexed by Offset Nn
Predecrement by 1
Long Displacement
Long Displacement
Short Displacement
Address Register
Immediate Data
Absolute Address
Absolute Short Address
I/O Short Address
Immediate Short Data
Short Jump Address
Implicit
Note 1: Refer to Figure A-6 for the assembler syntax.
A.3

CONDITION CODE COMPUTATION

The CCR contains the condition code bits Carry (C), Overflow (V), Zero (Z), Negative (N), Infinity (I), Local
Reject (LR), Reject (
The C, V, Z, N, I, LR,
Data ALU operation. The C, V, Z and N bits are also affected by Address Generation Unit calculations
during MOVETA instruction execution. The CCR bits are not affected by data transfers over the X, Y or
global data buses.
The standard definition of the CCR bits is given below. Exceptions to these are given in Figure A-4.
C(Carry)
Set if a carry is generated in an integer addition. Also set if a borrow is generated in an
integer subtraction. The carry or borrow is generated out of the most significant bit
(MSB) of the result. The carry bit is also modified by bit manipulation, rotate, and shift
integer instructions as well as by the Address Generation Unit operation when execut-
ing MOVETA instructions. Cleared otherwise. The carry bit is not affected by floating-
point instructions. The C bit is cleared during processor reset.
V(Overflow)
Set if an arithmetic overflow occurs in a fixed point operation. This indicates that the
result is not representable in the destination size. The V bit is not affected by floating-
point operations unless they have a fixed point result. The overflow bit is also modified
A - 2
Address Register Indirect
Figure A-1. Addressing Mode Summary
R), and Accept (A).
R, and A bits are true condition code bits that reflect the condition of the result of a
DSP96002 USER'S MANUAL
Mode
Reg
Register Direct
100
Rn
011
Rn
010
Rn
001
Rn
000
Rn
101
Rn
111
Rn
Rn
PC Relative
Rn
Special
110
100
110
000
Addressing
Categories
Assembler
U P
M
A
Syntax
X
Note 1
X
Rn
X
Nn
X
Mn
X
X
X
X
(Rn)
X
X
X
X
(Rn)+
X
X
X
X
(Rn)-
X
X
X
X
(Rn)+Nn
X
X
X
(Rn)- Nn
X
X
(Rn+Nn)
X
X
-(Rn)
X
(Rn+displacement)
(PC+displacement)
(PC+xx)
(PC+Rn)
X
#Data
X
X
label
X
X
#xx
X
X
MOTOROLA
aa
pp
xx

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